Principal ASIC CAD Engineer (hybrid remote - will relocate to Boston area)
LaBine and Associates
Full-time
On-site
This is a Hybrid role and relocation will be provided.
We seek talented and motivated individuals to tackle challenging engineering problems in advanced digital IC design.
• As a Principal CAD Engineer, you will be working with the design team in developing and implementing design flows for both analog and digital ASIC design from architecture to tape-out.
• You will be developing new design capabilities, testing and validating flows and running and debugging tools for every aspect of the design process.
• The applicant will have demonstrated prior experience developing scripts and flows with commercial EDA tools.
Required Qualifications:
• MSEE and 10+ years of relevant experience
• Experience designing, developing, and supporting CAD tool flow for both analog and digital ASIC design
• Ability to work with internal and external tool developers to implement enhancements to support a highly efficient workflow
• Fluency in scripting languages and ability to develop tools
• Clear communication and ability to work well in teams
• Familiarity with analog, digital and mixed-signal design flows
• Strong analytical and problem-solving skills
• Experience with Linux/UNIX OS, patching, piping, batching, etc.
Preferred Qualifications:
• PhD
• Experience with Cadence tool flows preferred
• Fluent in VHDL and Verilog
• Knowledge of SystemVerilog
• Ability to provision new computer systems for ASIC design
The ability to manage Linux environments is also required.
The ideal applicant will have the ability to proactively identify improvements to processes, implement them and roll them out to the team.
Join us as we develop novel digital, analog, and mixed-signal ICs!
Location: Cambridge, MA
Security Clearance: US Citizen/Clearable
We seek talented and motivated individuals to tackle challenging engineering problems in advanced digital IC design.
• As a Principal CAD Engineer, you will be working with the design team in developing and implementing design flows for both analog and digital ASIC design from architecture to tape-out.
• You will be developing new design capabilities, testing and validating flows and running and debugging tools for every aspect of the design process.
• The applicant will have demonstrated prior experience developing scripts and flows with commercial EDA tools.
Required Qualifications:
• MSEE and 10+ years of relevant experience
• Experience designing, developing, and supporting CAD tool flow for both analog and digital ASIC design
• Ability to work with internal and external tool developers to implement enhancements to support a highly efficient workflow
• Fluency in scripting languages and ability to develop tools
• Clear communication and ability to work well in teams
• Familiarity with analog, digital and mixed-signal design flows
• Strong analytical and problem-solving skills
• Experience with Linux/UNIX OS, patching, piping, batching, etc.
Preferred Qualifications:
• PhD
• Experience with Cadence tool flows preferred
• Fluent in VHDL and Verilog
• Knowledge of SystemVerilog
• Ability to provision new computer systems for ASIC design
The ability to manage Linux environments is also required.
The ideal applicant will have the ability to proactively identify improvements to processes, implement them and roll them out to the team.
Join us as we develop novel digital, analog, and mixed-signal ICs!
Location: Cambridge, MA
Security Clearance: US Citizen/Clearable