Job Description:
- Collaboration with a multi-disciplined design team (electrical engineers, systems engineers, SW engineers, etc) to design and integrate challenging DSP FPGA designs for wireless systems.
- Implementation and validation of highly complex designs in either new or existing modular HDL designs.
- Bring up, configuration, characterization, and debugging of new hardware.
- Conducting experimental tests on the latest FPGA and SoC evaluation boards, evaluating results and developing specifications for selecting next-generation components for deliverable systems.
- Developing and maintaining requirements documents, functional specification documents, interface control documents, etc.
Required Qualifications:
- At least 5 years of experience in hand on FPGA Design.
- Experience of RTL design with Verilog or SystemVerilog.
- Experience of bringing up and debugging FPGA based HW and FW.
- Experience developing and implementing FPGA-optimized versions of DSP algorithms.
- Experiencing in developing RTL Simulation and Verification environments.
Preferred Qualifications:
- Familiarity with modern Xilinx FPGA and SoC families and design tools (Ultrascale+, Ultrascale Zynq, RFSoC, Vivado, Xilinx IP cores)
- Experience with standard internal interfaces such as AXI4, AXI4-Stream, AXI4-Lite.
- Experience working with SoC designs such as Zynq and Zynq Ultrascale+ including architecting and interfacing with peripherals, interrupts, and related bus architectures.
- Familiarity with Xilinx Vivado and SDK.
- Experience with UVM verification methodology,Β developing test cases and test benches for FPGA design.